1. Field of the Invention
The present invention relates to solid state imaging devices being manufactured in a CMOS- or MOS-technology. More particularly, an amplifying circuit and a method for eliminating fixed pattern noise in the output signal of a pixel or of an image sensor are disclosed.
2. Technical Background
Solid state image sensors are well known. Commonly solid state image sensors are implemented in a CCD-technology or in a CMOS- or MOS-technology. Solid state image sensors find a widespread use in camera systems. A matrix of pixels comprising light sensitive elements constitutes an image sensor, which is mounted in the camera system. The signal of said matrix is measured and multiplexed to a so-called video signal.
CCD-based camera systems have less noise fluctuations in the image compared to CMOS- or MOS-based camera systems. Therefore CCD-based camera systems are nowadays preferred in applications wherein a high image quality is required such as video or still camera applications. Due to the further miniaturization of the CMOS electronics technology, it is possible to realize complex CMOS- or MOS-based pixels as small as CCD-based pixels. It is a further advantage of CMOS- or MOS-based pixels that CMOS is a technology being offered by most foundries whereas CCD-technology is rarely offered and is a more complex and expensive one.
Of the image sensors implemented in a CMOS- or MOS-technology, CMOS or MOS image sensor with passive pixels and CMOS or MOS image sensors with active pixels are distinguished. An active pixel is configured with means integrated in the pixel to amplify the charge that is collected on the light sensitive element. Passive pixels do not have said means and require a charge-sensitive amplifier that is not integrated in the pixel and is connected with a long line towards the pixel. For this reason, active pixel image sensors are potentially less sensitive to noise fluctuations than passive pixels. Due to the additional electronics in the active pixel, an active pixel image sensor may be equipped to execute more sophisticated functions, which can be advantageous for the performance of the camera system. Said functions can include filtering, operation at higher speed or operation in more extreme illumination conditions. It remains however a main drawback of active pixel CMOS or MOS image sensors, hampering their use in applications requiring a high image quality, that their output signal has an additional non-uniformity caused by the statistical spread of the characteristics of the electronic components composing the active pixel. An example of such characteristic being subject to manufacturing process variations is the threshold voltage of MOS transistors, integrated in the pixel. If no precautions are taken, this non-uniformity, called fixed pattern noise or FPN, is seen as a “snow-like” overlay over an image taken with a CMOS or MOS image sensor with active pixels.
Several solutions have been proposed to solve this problem. They are all based on a ‘double sampling’ technique, this means that the pixel is read out twice. The first readout refers to the pixel output level in the dark, and the other readout refers to the pixel output level after illumination. The prior readout will be called R and the latter readout will be called S in this text. Both the R and S signals are influenced in the same way by offset variations in the components of the pixel. By consequence, the difference between both signals is free of pixel offset variations.
Very often, the pixel readout that refers to the dark pixel output is the readout of a pixel that has been ‘reset’. This means that the pixel has been put into a known state that is equivalent to the situation where no light falls in on the pixel. The pixel signal after illumination is usually obtained after waiting a time period, called integration time, during which charges are collected that are generated by the light. However, there are also other approaches.
One possible implementation of the double sampling method is shown in FIG. 9. The S signal and the R signal are both sampled on a capacitor at the appropriate moment in time when the pixel delivers these signals. Usually, this occurs right after the selection of a new row in the imager. This method suppresses the offset variations of the pixels completely. There is however a problem with column-level offset variations. Because both the R and the S signals have a different signal path, they will be influenced differently by offset variations of the amplifying elements in the columns. Offset variations of the 2 amplifiers in each column add to the differential signal and cause fixed pattern noise.
U.S. Pat. No. 5,841,126 (Fossum et al.) proposes a solution to this problem. On every pixel readout, there is an extra step for offset compensation of the column amplifiers. FIG. 10 shows a generalized schematic of this principle. In the actual description of the referred patent, the amplifiers are PMOS source followers. Compared to FIG. 9, there is an additional switch ‘D’ at the input of the 2 column amplifiers. This switch can connect the 2 inputs of the amplifiers together. Additional switches ‘E’ are used to connect the output amplifier inputs to a known reference voltage and there are 2 additional series-connected capacitors between the inputs of the output amplifier and the readout busses. To compensate the offset variations between the 2 column amplifiers, the device is read out in 2 phases. First, switches ‘E’ are closed while the R and S signals are put on the reset and signal readout busses. The R and S signals appear across the series capacitors at the output amplifier. Then, switches ‘E’ are opened and ‘D’ is closed. Because switches ‘E’ are open, the voltage across the capacitors cannot change any more. But because ‘D’ is closed, the inputs of the two amplifiers are the same. The offset levels of the output amplifiers are put on the differential readout bus. Across the capacitors is the R and S signal, including the offset level of both amplifiers, but with an inverse polarization. On the other side of the capacitors, the R and S signals appear, without the amplifier offsets. The offset levels and the difference in these levels of the two amplifiers are in this way subtracted from the differential signal at the output. The disadvantage of this method is a doubled multiplexing speed, which compromises the maximal obtainable pixel rate. The column amplifiers must be designed twice as fast as in a normal multiplexer.
European patent EP 0 773 669 B1 (B. Dierickx) proposes a solution based on one single amplifier with an additional control input to compensate the non-uniformity of the pixels and of the amplifier itself. A single-ended readout bus is used. This approach does offer a faster readout, because only the pixel signal needs to be multiplexed to the output. The entire pixel readout period is available for multiplexing this signal. However, this approach suffers from a little residual FPN that is caused by a non-complete suppression of threshold voltage variations of one particular transistor of the column amplifier.